In an unusual move for Intel, the chip giant has ever so slightly taken the wraps off of one of their future generation Core architectures. Basic information on the Ice Lake architecture has been published over on Intel's codename decoder, officially confirming for the first time the existence of the architecture and that it will be made on Intel's 10nm+ process.

The Ice Lake processor family is a successor to the 8th generation Intel® Core™ processor family. These processors utilize Intel’s industry-leading 10 nm+ process technology.

This is an unexpected development as the company has yet to formally detail (let alone launch) the first 10nm Core architecture –  Cannon Lake – and it's rare these days for Intel to talk more than a generation ahead in CPU architectures. Equally as interesting is the fact that Intel is calling Ice Lake the successor to their upcoming 8th generation Coffee Lake processors, which codename bingo aside, throws some confusion on where the 14nm Coffee Lake and 10nm Cannon Lake will eventually stand.

As a refresher, the last few generations of Core have been Sandy Bridge, Ivy Bridge, Broadwell, Haswell, Skylake, with Kaby Lake being the latest and was recently released at the top of the year. Kaby Lake is Intel’s third Core product produced using a 14nm lithography process, specifically the second-generation ’14 PLUS’ (or 14+) version of Intel's 14nm process.

Meanwhile when it comes to future products, back at CES Intel briefly showed a device based on post-Kaby Lake designs, called Cannon Lake and based on their 10nm process. Since then Intel has also confirmed that the 8th Generation of processors for desktops, called Coffee Lake, will be announced on August 21st (and we recently received promotional material to that effect). Ice Lake then, seems poised to follow both Coffee Lake and Cannon Lake, succeeding both architectures with a single architecture based on 10nm+.

Working purely on lithographic nomenclature, Intel has three processes on 14nm: 14, 14+, and 14++. As shown to everyone at Intel’s Technology Manufacturing Day a couple of months ago, these will be followed by a trio of 10nm processes: 10nm, 10nm+ (10+), and 10++,

On the desktop, Core processors will go from 14 to 14+ to 14++, such that we move from Skylake to Kaby Lake to Coffee Lake. On the Laptop side, this goes from 14 to 14+ to 14++/10, such that we move from Skylake to Kaby Lake to Coffee Lake like the desktops, but also that at some time during the Coffee Lake generation, Cannon Lake will also be launched for laptops. The next node for both after this is 10+, which will be helmed by the Ice Lake architecture.

Intel's Core Architecture Cadence
Microarchitecture Core Generation Process Node Release Year
Sandy Bridge 2nd 32nm 2011
Ivy Bridge 3rd 22nm 2012
Haswell 4th 22nm 2013
Broadwell 5th 14nm 2014
Skylake 6th 14nm 2015
Kaby Lake 7th 14nm+ 2016
Coffee Lake 8th 14nm++ 2017
Cannon Lake 8th? 10nm 2018?
Ice Lake 9th? 10nm+ 2018?

The way that the desktop and laptop markets will be diverging then converging is confusing a lot of people. Why is the laptop market splitting between 14++ and 10, and why is the desktop market not going to 10nm but straight to 10+? What lies beyond is a miasma of guess work, leaked slides, and guessing Intel’s strategy, but I believe the answer lies in Intel’s manufacturing technologies and the ability to move to newer lithographic nodes.

(We should interject here that the naming of a lithographic node has slowly lost its relevance between the features of the process and the actual transistor density and performance, such that TSMC’s improved 16FF+ is called 12FFN, but relies on similar transistor sizes with enhanced attributes. But 12 is a smaller number than 14, which is the marketing angle kicking in. By all accounts, Intel has typically been considered the more accurate foundry when it comes to numerical lithographic naming of the process, which others consider is to their detriment.)

Intel originally predicted that they would move to 10nm almost a year ago, at the end of 2016 and 2 years after the launch of their 14nm process. But the challenge in managing the technology required to advance to their version of 10nm has been fraught with difficulty. In all cases it can depend on external equipment, fine tuning a process, or getting acceptable yields – while one manufacturer might be satisfied with an 80% yield, another might consider that a failure. Being able to obtain high yields (ramp up) will also be a function of die size, and so the newest nodes are typically launched with smaller mobile parts in mind first, as the yields for smaller parts are better than larger parts at the same defect rate.

Simply put, the first generation of 10nm requires small processors to ensure high yields. Intel seems to be putting the smaller die sizes (i.e. anything under 15W for a laptop) into the 10nm Cannon Lake bucket, while the larger 35W+ chips will be on 14++ Coffee Lake, a tried and tested sub-node for larger CPUs. While the desktop sits on 14++ for a bit longer, it gives time for Intel to further develop their 10nm fabrication abilities, leading to their 10+ process for larger chips by working their other large chip segments (FPGA, MIC) first.

From a manufacturing standpoint, Intel has been using multiple patterning techniques in its 14nm processes, and the industry is looking to when the transition to EUV will take place. Anton has some great writeups of the state of EUV and how different companies are transitioning to smaller nodes - they are well worth a read.

The crux of the matter is that EUV would shorten time to market and arguably make the process easier (if only more expensive), and several fab companies are waiting for Intel to jump onto it first. With EUV not ready, Intel has had to invest into deeper multi-patterning techniques, which raise costs, decrease yields, and increase wafer process times considerably.

All of which leads to a miasma of increased delays, much to the potential chagrin of investors but also customers who had banked on the power improvements that a typical new lithography node brings. Intel is still keeping spirits high, by producing numbers that would suggest that their methodology is still in tune with Moore’s Law, even if the products seem to be further strung out. Some analysts concur with Intel’s statements, while others see it as hand-waving until 10/10+ hits the market. Intel would also point out that it is developing other technologies such as Embedded Multi-Die Interconnect Bridges (EMIB) to assist in equipping chip with high-speed fabric or glue-logic.

Given its position as a post-8th gen architecture, Ice Lake is likely to hit sometime in 2018, perhaps 2019, depending on Intel’s rate of progress with larger chips and the 10+ process. Intel’s other market segments, such as FPGAs (Altera), Xeon Phi (MIC) and custom foundry partners, are also in the mix to get into some 10nm action.

(Note that Intel’s next generation of Xeon Scalable Processors is called Cascade Lake, a 2018 refresh of the Skylake generation launched this year.)

Source: Intel

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  • HStewart - Wednesday, August 16, 2017 - link

    This reminds me of the frequency wars - now we having multi-core wars and you are right, this is a lot of marketing, There are rumors also that 7nm coming out - and that is probably closer to 10nm or even 12nm on Intel's side.

    One thing it appears is that smaller the die gets, the harder it appears to create the process.

    For me personally, I not sure of need for more than 4 cores - but that will change over time as all technologies with chips - when the first 32 bit chips came out - I never thought I need 64 bit. But just as 8 bit - went to 16 bit and then 32 bit - 64 bit is logical. I don't think we need 128 bit now - but who knows in decade from now - things might be change.

    I also believe Intel's process allows Intel to put more cores on single die - instead combine multiple dies together to achieved this goal.
  • Pork@III - Tuesday, August 15, 2017 - link

    Ice Lake or Ice Fake :D
  • serendip - Wednesday, August 16, 2017 - link

    Hopefully Atom-like chips with 2W or 4W TDP will make a comeback thanks to the process node power savings. Apollo Lake can't be stuffed into tablets because TDP is too high. I'm happy with my Cherry Trail Windows tablet but a newer design with a faster GPU supporting hi-DPI screens would be great.
  • HStewart - Wednesday, August 16, 2017 - link

    My guess is that possibly the Atom name would be retried but Intel will move it in to line similar to what they did with Core-M and Y series chips - People tend to put down Core-M and I am typing this on m3-6y30 based Intel Compute Stick - it actually quite fast compare to say my older original Microsoft Surface Pro

    But you are right these chips would be hard to stuff into small tablet - but the price needs to be there to compete with ARM. Intel appears to have a lot of research - most of it is in embedded markets - like Quark processor which has even less power than the Atom.
  • rtho782 - Wednesday, August 16, 2017 - link

    I'd love to see Intel fab GPUs for nVidia....
  • iwod - Wednesday, August 16, 2017 - link

    It should be Sandy Bridge, Ivy Bridge, Haswell then Broadwell, the post have the "well" generation wrong way round.

    Since we are still on the lake architecture, does that mean all we get is an 10nm Skylake? Cannonlake generation was suppose to be a new uArc. And we are straight to Ice Lake?

    Meanwhile I am eagerly waiting for AMD with Zen2 on 7nm next year.
  • Gondalf - Wednesday, August 16, 2017 - link

    No Zen2 on 7nm next year. The process is very late and the cpu integration too. Apparently AMD want EUV at 7nm, quad patterning is too complex for actual AMD resources. Go to EETimes, there is a nice article on this.....AMD exec claims:
    "AMD is among chip designers getting an early taste of 7nm process technologies"

    They are "tasting"
  • Lolimaster - Wednesday, August 16, 2017 - link

    Zen2 is coming Q3-Q4 2018.
  • minde - Wednesday, August 16, 2017 - link

    mobile processors u 15w from coffeelake or cannonlake will be with 4core
  • Lolimaster - Wednesday, August 16, 2017 - link

    The bad thing about intel is that all their existing desing all the way to tiger lake (which was supposed to be a die shrink of Ice Lake) are based on the nehalem/sb arch, they were never intended to be scalable multicore chips with good production/yield ratio.

    Zen is the contratry, is a design for the true mass multicore era for both supercomputing, servers all the way to consumers, all in just 1 design. Zen really screwed intel plans for the next 5 years.

    10cores plus for consumers on intel side has proven to be a patch work for the panic mode.

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