AI
As part of their efforts to push the boundaries on the largest manufacturable chip sizes, Taiwan Semiconductor Manufacturing Co. is working on its new Chip-On-Wafer-On-Substrate-L (CoWoS-L) packaging technology that will allow it to build larger Super Carrier interposers. Aimed at the 2025 time span, the next generation of TSMC's CoWoS technology will allow for interposers reaching up to six times TSMC's maximum reticle size, up from 3.3x for their current interposers. Such formidable system-in-packages (SiP) are intended for use by performance-hungry data center and HPC chips, a niche market that has proven willing to pay significant premiums to be able to place multiple high performance chiplets on a single package. "We are currently developing a 6x reticle size CoWoS-L technology with Super Carrier interposer technology,"...
New Uses for Smartphone AI: A Short Commentary on Recording History and Privacy
This opinion piece is reactionary to recent announcements. Having just attended the Huawei keynote here at the IFA trade show, there were a couple of new features enabled through AI...
25 by Dr. Ian Cutress on 9/6/2019Hot Chips 31 Live Blogs: Xilinx Versal AI Engine
Xilinx, the manufacturer of FPGAs, announced its new Versal AI engine last year as a way of moving FPGAs into the AI domain. This talk is set to expand...
19 by Dr. Ian Cutress on 8/20/2019Honor Set to Enter TV Market with New Honghu 8K CPU
Not being shy to take some gambles, this one appears to be its biggest yet: Honor is going to be developing both TVs and display scalers for the consumer...
23 by Dr. Ian Cutress on 7/30/2019Intel's Xeon Cascade Lake vs. NVIDIA Turing: An Analysis in AI
It seems like the new motto for Silicon Valley for the last few years has been “Data is the new oil,” and for good reason. The number of companies...
56 by Johan De Gelas on 7/29/2019Intel Acquires Omnitek: FPGA Video Acceleration and Inferencing
One of the characteristics of Intel is its investment into new IP. This usually takes several forms, such as internal R&D, investing in other companies through Intel Capital, or...
11 by Ian Cutress on 4/16/2019AI On The Edge: New Flex Logix X1 Inference AI Chip For Fanless Designs
A large number of inference demonstrations published by the big chip manufacturers revolve around processing large batch sizes of images on trained networks. In reality, when video is being...
4 by Ian Cutress on 4/10/2019The AI Race Expands: Qualcomm Reveals “Cloud AI 100” Family of Datacenter AI Inference Accelerators for 2020
This morning at their first AI Day, the 800lb gorilla of the mobile world, Qualcomm announced that they are getting into the AI accelerator market, and in an aggressive...
26 by Ryan Smith on 4/9/2019BlackBerry Acquires Cylance, Gets AI & ML Security Technology
BlackBerry Limited has announced that it had completed acquisition of Cylance, a company developing machine learning and artificial intelligence-based security technology. The move adds valuable IP and technologies to...
22 by Anton Shilov on 2/25/2019Scaling Inference with NVIDIA’s T4: A Supermicro Solution with 320 PCIe Lanes
When visiting the Supercomputing conference this year, there were plenty of big GPU systems on display for machine learning. A large number were geared towards the heavy duty cards...
12 by Ian Cutress on 11/19/2018Huawei’s GPU Turbo: Valid Technology with Overzealous Marketing
One of the biggest announcements from Huawei this year is that of its new GPU Turbo technology. The claims that it could provide more performance at less power, without...
64 by Ian Cutress & Andrei Frumusanu on 9/4/2018IFA 2018: Honor Play Launch, a Live Blog
After some meetings this morning, the next event on our list is the western launch of the Honor Play: a Kirin 970 smartphone that focuses on AI. Honor is...
3 by Ian Cutress on 8/30/2018Khronos Group Releases Neural Network Exchange Format 1.0, Showcases First Public OpenXR Demo
Today at SIGGRAPH the Khronos Group, the industry consortium behind OpenGL and Vulkan, announced the ratification and public release of their Neural Network Exchange Format (NNEF), now finalized as...
8 by Nate Oh on 8/14/2018Xilinx Acquires DEEPhi Tech ML Startup
Xilinx this week announced that it had taken over DeepPhi Technology, a machine learning startup from China. DEEPhi has been using Xilinx FPGA for its ML projects since its...
2 by Anton Shilov on 7/19/2018AMD Demos 7nm Vega GPU: Betting Big on Machine Learning for Radeon Instinct; Shipping This Year
In a fairly unexpected move, AMD formally demonstrated at Computex its previously-roadmapped 7nm-built Vega GPU. As per AMD's roadmaps on the subject, the chip will be used for AMD’s...
29 by Anton Shilov on 6/6/2018Cambricon, Makers of Huawei's Kirin NPU IP, Build A Big AI Chip and PCIe Card
Cambricon Technologies, the company in collaboration with HiSilicon / Huawei for licensing specialist AI silicon intellectual property for the Kirin 970 smartphone chipset, have gone solo and created their...
27 by Ian Cutress on 5/26/2018Honor 10 Launch and Hands On: Kirin 970, More AI, More Notch
In a world filled with rectangular blocks with displays, it takes a large effort to differentiate. The new Honor 10, launched today at an event in London, follows the...
34 by Ian Cutress on 5/15/2018Interview with Aicha Evans, Intel’s Chief Strategy Officer
Expanding into several different new markets has challenges that only the most well positioned and structured companies can achieve. Having covered the growth of Intel over the last ten...
30 by Ian Cutress on 4/4/2018Huawei P20 and P20 Pro Hands-On: Embrace the Notch
It’s time to have a serious discussion about the Notch. Love it or hate it, the Notch is going to be a defining element of major smartphones this year...
76 by Ian Cutress on 3/27/2018Microsoft Announces AI Platform for Windows Developers: Machine Learning On The Edge
Today Microsoft is hosting a developer day, and one of the highlights they are showcasing is a new API called WinML. Artificial Intelligence and Machine Learning are two of...
10 by Brett Howse on 3/7/2018Google Announces Cloud TPU v2 Beta Availability for Google Cloud Platform
This week, Google announced Cloud TPU beta availability on the Google Cloud Platform (GCP), accessible through their Compute Engine infrastructure-as-a-service. Using the second generation of Google’s tensor processing units...
8 by Nate Oh on 2/15/2018