In quite an unexpected turn of events, Intel on Tuesday announced that its foundry division would produce chips for contract chip maker Tower Semiconductor. Tower was a previous acquisition target for Intel, with that deal unraveling just a few weeks ago due to a lack of regulatory approval from China. But, as it would seem, despite the failure of the acquisition, it seems that Intel and Tower will be working together after all – just with Intel doing fab work for Tower. Under the new deal, Intel will make chips for Tower's customers at its Fab 11X in Rio Rancho, New Mexico, which is one of Intel's leading-edge fabs.

Based on the agreement's conditions, Intel Foundry Services will provide a 'new capacity corridor of over 600,000 photo layers per month' for Tower to meet the anticipated client needs for 300mm advanced analog processing, something that Intel has not done at its own fabs for a while. IFS will produce chips for Tower starting from 2024, when Tower's process flow is qualified at its fab. In return, Tower plans to invest up to $300 million in procuring of fab tools and other fixed assets for Intel's Fab 11X.

While the two companies remain tight lipped about actual products that IFS will produce for Tower Semiconductor, they did imply on power management ICs using Tower's 65 nm power management BCD (bipolar-CMOS-DMOS) process. Meanwhile both firms have alluded to utilizing other production nodes at Intel’s Fab 11X, including 65 nm radio frequency silicon-on-insulator (RF SOI), which would be the first time when Intel will use SOI of any kind.

"As we look to the future, our primary focus is to expand our customer partnerships through high-scale manufacturing of leading-edge technology solutions," said Russell Ellwanger, chief executive officer of Tower Semiconductor. "This collaboration with Intel allows us to fulfill our customers' demand roadmaps, with a particular focus on advanced power management and radio frequency silicon on insulator (RF SOI) solutions, with full process flow qualification planned in 2024. We see this as a first step towards multiple unique synergistic solutions with Intel."

For Tower, the deal marks a progressive move towards greater expansion, catering to a growing clientele in 300 mm technologies. The augmented scale from this deal enables Tower to address broader opportunities using its current production nodes, but also to bolster relationships with large clients with massive needs, laying the groundwork for development of future production nodes.

Intel, on the other hand, will be able to fully use its Fab 11X capacity in New Mexico without needing to invest in all of the tools that will eventually end up installed there.

"We launched Intel Foundry Services with a long-term view of delivering the world's first open system foundry that brings together a secure, sustainable, and resilient supply chain with the best of Intel and our ecosystem," said Stuart Pann, Intel senior vice president and general manager of Intel Foundry Services. "We are thrilled that Tower sees the unique value we provide and chose us to open their 300mm U.S. capacity corridor."

Source: Intel

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  • Calabros - Wednesday, September 6, 2023 - link

    65nm just never dies.
  • Glaurung - Wednesday, September 6, 2023 - link

    Why should it? Fully amortized foundry with no EUV equipment required, no multiple exposures required = extremely cheap production cost. Fully mature process node = very low rate of faulty chips. For a class of simple chips that don't need to cram in lots of transistors or need the lowest possible power draw, there's no benefit from going smaller.
  • FunBunny2 - Wednesday, September 6, 2023 - link

    I read here some time ago that making any/most/all embedded processor chips (in the xxK transistor count class) on 'current' nodes would yield a chip that was near microscopic. I think, but not sure, that mounting such in a package was said to be really difficult, since the wiring points would be so close together.
  • Threska - Wednesday, September 6, 2023 - link

    Makes for a move from "system on a chip" to "car on a chip". At least a leg up in autonomous vehicles.
  • Kevin G - Wednesday, September 6, 2023 - link

    The lithography mechanics at 65 nm are very mature but Intel does need to adapter a bit to SOI. There is likely going to be a small learning curve and ramp up before things resume. However with the high yields expected of 65 nm today, their is still going to be a slight premium invoked for using SOI wafers. Still cheap, just not as cheap as one would initially expect.
  • shing3232 - Wednesday, September 6, 2023 - link

    anything lower than 65nm is undesirable for CMOS.
  • Samus - Monday, September 11, 2023 - link

    Exactly this. And CMOS isn't going anywhere. There are so many conditions where the integrity offered by 65nm is critical, especially outer space.
  • StevoLincolnite - Wednesday, September 13, 2023 - link

    And you can still make fairly decent chips on 65nm. I.E. 1 Billion transistors at 400mm2.
  • RicksCollege - Wednesday, September 6, 2023 - link

    Anyone who knows/has worked for Russel Ellwanger (pronounced El-vonger) knows he’s kind of a pompous a-hole. Told me once that nobody helped him get to where he is today. That’s right, Russel Ellwanger invented it all.

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