Intel's Architecture Day 2018: The Future of Core, Intel GPUs, 10nm, and Hybrid x86by Dr. Ian Cutress on December 12, 2018 9:00 AM EST
- Posted in
It has been hard to miss the fact that Intel has been vacuuming up a lot of industry talent, which brings with them a lot of experience. Renduchintala, Koduri, Keller, Hook, and Carvill, are just to name a few. This new crew has decided to break Intel out of its shell for the first time in a while, holding the first in a new tradition of Intel Architecture Days. Through the five hours of presentations, Intel lifted the lid on the CPU core roadmaps through 2021, the next generation of integrated graphics, the future of Intel’s graphics business, new chips built on 3D packaging technologies, and even parts of the microarchitecture for the 2019 consumer processors. In other words, it's many of the things we've been missing out on for years. And now that Intel is once again holding these kinds of disclosures, there’s a lot to dig in to.
Intel covered a good amount of ground at the Architecture Day, which we’ve split into the following categories:
- The CPU Core and Atom Roadmaps, on 10nm
- The Sunny Cove Microarchitecture
- The Next Generation Gen11 Graphics
- Intel Demonstrates Sunny Cove and Gen11 Graphics
- Beyond Gen11 Graphics: Announcing the Xe Graphics Brand
- 3D Packaging with FOVEROS
- Intel’s first Fovoros and first Hybrid x86 CPU: Core plus Atom in 7 W on 10nm
- Ice Lake 10nm Xeon
- Intel Made Something Really Funny: Q&A with Raja, Jim, and Murthy
The CPU Core Roadmaps
It is common for companies like Intel to ask members of the press what they enjoy about announcements from Intel, Intel’s competitors, or other companies in the industry. One of answers I will never tire of saying is ‘roadmaps’. The roadmap is a simple document but it enables a company to explain part of its future plans in a very easy to understand way. It shows to the press, to customers, and to partners, that the company has a vision beyond the next product and that it expects to deliver at a rough cadence, hopefully with some markers on expected performance additions or improvements. Roadmaps are rarely taken as set in stone either, with most people understanding that they have an element of fuzziness depending on external factors.
To that end, I’ve been requesting Intel to show roadmaps for years. They used to be common place, but ever since Skylake, it has kind of dried up. In recent months Intel has shown rough datacentre roadmaps, with Cascade Lake, Cooper Lake, and Ice Lake and the next few generations. But for the Core family it has been somewhat more difficult. Depending on which analyst you talk to, a good number will point to some of the Skylake derivatives as being holding points while the issues with 10nm have been sorted out. But nonetheless, all we tend to hear about is the faint whisper of a codename potentially, which doesn’t mean much.
So imagine my delight when we get not one roadmap from Intel on CPUs, but two. Intel gave us both the Core architecture roadmap and the Atom architecture roadmap for the next few generations.
For the high performance Core architecture, Intel lists three new codenames over the next three years. To be very clear here, these are the codenames for the individual core microarchitecture, not the chip, which is an important departure from how Intel has previously done things.
Sunny Cove, built on 10nm, will come to market in 2019 and offer increased single-threaded performance, new instructions, and ‘improved scalability’. Intel went into more detail about the Sunny Cove microarchitecture, which is in the next part of this article. To avoid doubt, Sunny Cove will have AVX-512. We believe that these cores, when paired with Gen11 graphics, will be called Ice Lake.
Willow Cove looks like it will be a 2020 core design, most likely also on 10nm. Intel lists the highlights here as a cache redesign (which might mean L1/L2 adjustments), new transistor optimizations (manufacturing based), and additional security features, likely referring to further enhancements from new classes of side-channel attacks.
Golden Cove rounds out the trio, and is firmly in that 2021 segment in the graph. Process node here is a question mark, but we’re likely to see it on 10nm and or 7nm. Golden Cove is where Intel adds another slice of the serious pie onto its plate, with an increase in single threaded performance, a focus on AI performance, and potential networking and AI additions to the core design. Security features also look like they get a boost.
|Intel Core Microarchitecture Roadmap|
|Core Name||Year||Process Node||Improvements|
|Skylake||2015||14 nm||Single Threaded Performance
|Kaby Lake||2016||14 nm+||Frequency|
|Coffee Lake||2017||14 nm++||Frequency|
|Coffee Refresh||2018||14 nm++||Frequency|
|Sunny Cove||2019||10 nm||Single Threaded Performance
|Willow Cove||2020 ?||10 nm ?||Cache Redesign
New Transistor Optimization
|Golden Cove||2021 ?||7 / 10 nm ?||Single Threaded Performance
Networking / 5G Performance
The lower-powered Atom microarchitecture roadmap is on a slower cadence than the Core microarchitecture, which is not surprising given its history. Seeing as how Atom has to fit into a range of devices, we’re expecting there to be a wide range in capabilities, especially from the SoC side.
The upcoming microarchitecture for 2019 is called Tremont, which focuses on single threaded performance increases, battery life increases, and network server performance. Based on some of the designs later in this article, we think that this will be a 10nm design.
Following Tremont will be Gracemont, which Intel lists as a 2021 product. As Atom is designed to continually push both the performance at the high-end of its capabilities and the efficiency at the low-end, Intel lists that Gracemont will have additional single threaded performance and a focus on increased frequency. This will be combined with additional vector performance, which likely means that Atom will get some wider vector units or support new vector instructions.
Beyond this will be a future ‘mont’ core (and not month as listed in the image). Here Intel is spitballing what this new 2023 core might have, for which the general listing of performance, frequency and features is there.
|Intel Atom Microarchitecture Roadmap|
|Goldmont||2016||14 nm||Higher Performance
|Goldmont Plus||2017||14 nm||Branch Prediction
Larger Load/Store Buffers
|Tremont||2019||10 nm ?||Single Threaded Performance
Network Server Performance
|Gracemont||2021||10 nm ?||Single Threaded Performance
|'Next Mont'||2023||?||Single Threaded Performance
As stated above, these are just the microarchitecture names. The actual chips these cores are in will likely have different names, which means a Lake name for the Core microarchitecture. At the event, Intel stated that Ice Lake would have Sunny Cove cores in it, for example.
Another aspect to Intel’s presentations was that future microarchitectures are likely to be uncoupled from any process technologies. In order to build some resiliency into the company’s product line moving forward, both Raja Koduri and Dr. Murthy Renduchintala explained that future microarchitectures will not be process dependent, and the latest products will come to market on the best process technologies available at the time. As a result we’re likely to see some of the Core designs straddle different manufacturing technologies.
Intel also went into a bit of detail on microarchitecture of Sunny Cove.
Post Your CommentPlease log in or sign up to comment.
View All Comments
nathanddrews - Wednesday, December 12, 2018 - linkI know the meme about gaming on Intel graphics, but if they implement Adaptive Sync *combined* with some sort of low framerate compensation, it would make gaming on Intel IGP much less hilarious. Can Intel license FreeSync without using AMD GPU inside? I know FreeSync worked on KLG, but that had an AMD GPU.
RarG123 - Wednesday, December 12, 2018 - linkLike many of AMD's things, FS's an open standard and royalty free. Anyone can use it.
Ryan Smith - Wednesday, December 12, 2018 - linkMore specifically, Freesync 1 just AMD's implementation of DisplayPort Adaptive Sync. Intel has to build their own implementation in their display controller and driver stack, but past that all the signaling aspects to the monitor are standardized.
Topweasel - Wednesday, December 12, 2018 - linkRyan, I thought that was reversed, that AMD worked on adding Adaptive Sync into the specs and worked on making sure it's implementation matched what they were doing with Freesync.
kpb321 - Wednesday, December 12, 2018 - linkIIRC it's a bit of both. Adaptive Sync was present in the eDP standard for things like laptop monitors or tablets as a power saving feature. AMD brought this to the desktop side of things to use for variable framerates in games and helped the standard bring it over too.
edzieba - Wednesday, December 12, 2018 - link'Adaptive Sync' is effectively the eDP Panel Self Refresh ported over to the full DP spec.
drunkenmaster - Wednesday, December 12, 2018 - linkFreesync utilises adaptive sync. Adaptive Sync is the technology on the screen side, a screen must support adaptive sync to be used by Freesync. Freesync is just the AMD side of it. If a adaptive sync capable screen is detected you can turn on freesync in drivers. Adaptive sync was a standard written up and proposed by AMD and given to I forget who it is now, Displayport group direct or to Vesa. They accepted it and implemented it pretty quickly but as with all things standards take a long time for get integrated into the next cycle or two of products.
Anyone can use Adaptive sync panels, no one but AMD can use freesync as it's something specific to their hardware and drivers. intel will produce their own specific driver/implementation and just connected to adaptive sync panels in the same way.
porcupineLTD - Wednesday, December 12, 2018 - linkSo Intel is going straight to chiplets on interposer, it will be interesting to see if AMD adopts this with Zen 3 or waits until Zen 4. Anyway its nice to see competition doing its job.
Alexvrb - Wednesday, December 12, 2018 - linkWe don't know yet exactly how much logic Intel is moving to the interposer. It looks awesome for mobile form factors! I think they will face some challenges to bring it to high-TDP desktop solutions, though.
ajc9988 - Wednesday, December 12, 2018 - linkhttp://www.eecg.toronto.edu/~enright/micro14-inter... http://www.eecg.toronto.edu/~enright/Kannan_MICRO4... https://youtu.be/G3kGSbWFig4 https://seal.ece.ucsb.edu/sites/seal.ece.ucsb.edu/... https://www.youtube.com/watch?v=d3RVwLa3EmM&t=...