When Taiwan Semiconductor Manufacturing Co. (TSMC) is prepping to roll out an all-new process technology, it usually builds a new fab to meet demand of its alpha customers and then either adds capacity by upgrading existing fabs or building another facility. With N2 (2nm-class), the company seems to be taking a slightly different approach as it is already constructing two N2-capable fabs and is awaiting for a government approval for the third one.

We are also preparing our N2 volume production starting in 2025," said Mark Liu, TSMC's outgoing chairman, at the company's earnings call with financial analysts and investors. "We plan to build multiple fabs or multiple phases of 2nm technologies in both Hsinchu and Kaohsiung science parks to support the strong structural demand from our customers. […] "In the Taichung Science Park, the government approval process is ongoing and is also on track."

TSMC is gearing up to construct two fabrication plants capable of producing N2 chips in Taiwan. The first fab is planned to be located near Baoshan in Hsinchu County, neighboring its R1 research and development center, which was specifically build to develop N2 technology and its successor. This facility is expected to commence high-volume manufacturing (HVM) of 2nm chips in the latter half of 2025. The second N2-capable fabrication plant by is to be located in the Kaohsiung Science Park, part of the Southern Taiwan Science Park near Kaohsiung. The initiation of HVM at this plant is projected to be slightly later, likely around 2026.

In addition, the foundry is working to get government approvals to build a yet another N2-capable fab in the Taichung Science Park. If the company starts to construct this facility in 2025, the fab could go online as soon as in 2027.

With three fabs capable of making chis using its 2nm process technologies, TSMC is poised to offer vast 2nm capacity for years to come.

TSMC expects to start HVM using its N2 process technology that uses gate-all-around (GAA) nanosheet transistors around the second half of 2025. TSMC's 2nd generation 2nm-class process technology — N2P — will add backside power delivery. This technology will be used for mass production in 2026.

Source: TSMC

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  • Blastdoor - Thursday, March 14, 2024 - link

    There is nothing at all "fair" in your post, instead there's a ton of false equivalence and disingenuousness. "Differing opinions about the structure of governance" sounds so benign, but this "difference in opinion" is that the Taiwanese want a democracy while autocrats running the PRC want to also be autocrats running Taiwan. You might as well say that slaves and slaveholders have a "differing opinions about the nature of property rights" or that nazis and jews have "differing opinions about issues involving biology and genetics."

    The best American analogy that I can think of to the Taiwan situation is Puerto Rico. If the PRC handled Taiwan in the same way that the US handles Puerto Rico (which is essentially indifference -- if PR wants to leave fine, if they want to be a state fine, if they want to continue as a territory fine), there would be no problem. But PRC is terrified of their people getting crazy democratic ideas in their heads, and Taiwan is an example of Chinese people living in a relatively free and open democratic society. That example terrifies PRC leadership and they want that example eradicated.

    The whole "US show respect to other nations" thing is BS. You mean, show respect to the *leaders" of other nations, specifically the leader of China, not respect to the nation itself. And the respect you demand, oh PRC mouthpiece that you clearly are (because the talking points are so clearly aligned with PRC propaganda), is not reciprocated. China shows no respect to Japan or India. The US treats China with kid gloves compared to how China treats Japan.
  • my_wing - Friday, January 19, 2024 - link

    Don't hide TSMC management stupidity anandtech


    "Having said that, our internal assessments show that our N3P, now I repeat again, N3P technology demonstrated (a) comparable PPA to 18A, my competitors’ technology. But with an earlier time to market, better technology maturity and much better cost."

    Mark Liu and CC Wei @ TSMC = Bob Swan @ Intel

    Please do make this stupidity go away unnoticed, report it as it is, Backside Power Delivery is bring noticeable advantage in density and power efficiency. How can N3P compete with Intel 18A.

    A 2NM fab without EUV High NA so what is this different to Intel Ireland Fab 34? TSMC is no longer the bleeding edge, it should be call leading edge.
  • drwho9437 - Friday, January 19, 2024 - link

    Intel is most likely going to be on par and have backside power first.

    I get quite annoyed with writeups that bracket the relabeled Intel 4 nodes as (formerly 7 nm). These lengths are fantasies. Intel 4 is about TSMC 4 in density and other metrics. The relabeling is basically fair though no two nodes is exactly the same.

    Who will deliver good GAA devices in volume first is really the next milestone. Samsung already has limited volume of them, I believe I read yields are rather bad. The other milestone is backside power. Intel's coming nodes have them both. High-NA EUV should improve yield on 18 A even if they don't start with it.

    I don't think ASIC designers are dumb, if Intel 20A and 18A are good I expect a ton of AI ASICs on it. Qualcom seems an obvious user as do Amazon, and Microsoft. Tesla? the RISC V companies? Nvidia, Apple and AMD are trickier given their long relationships with TSMC. If we don't see some of the first list taping out major chips on Intel 20A/18A and instead going for TSMC 3 nodes we will know. We will also know by Lunar Lake or the chip that follows it (I know one Lunar Lake version will be done on TSMC node), but Intel's own choices will show the what 18A and 20A are best for.
  • my_wing - Tuesday, January 23, 2024 - link

    I don't think ASIC designer are dumb as well, we all understanding and I am talking about fact, if you do agree with the following fact then the whole argument I put here I will admit I am wrong.

    1) TSMC N3B and TSMC N3E have a different with different design rules and we needed a redesign to move from N3B to N3E.
    2) TSMC N3E is not as good in density but it much cheaper to made.
    3) Apple N3B processors did not move to N3E at this moment, as even Apple will not redesign it.
    4) Intel 20A/18A with Backside Power Delivery and GAA meant that the design rules is totally different and there is no / not enough automated tools to transform the design from FETs to GAA, front side to back side power delivery.
    5) Even the richest company on earth i.e. Apple will not throw away it's design and quickly move to N3E instead, they rather force TSMC to give them a good price.
    6) Other ASIC company and GPU Company are not going to invest in Intel 18A yet because this meant they will have take the gamble as the first mover, meaning now, arrow lake is not taken most of the R&D cost for GAA and PowerVIA, they can look at what Intel/Synopsys done and have better understanding to develop GAA PowerVIA design.
    7) Arrow Lake is using 20A/18A which should be better than anything TSMC N3 class offered. That is what Pat is saying Unquestionable Leadership of course Wei will say N3P > 18A.
    8) Lunar Lake (the version you mentioned might be done by TSMC) is a low power design basically a Meteor Lake Refresh. Arrow Lake market time is ahead of Lunar Lake.

    So to answer your question, it is perfectly understandable that ASIC designer do not become the 1st mover to the tech i.e. Risk and Reward. Once the Design tools from Synopsis is more capable to design GAA and PowerVIA, the conversion cost become lower, then ASIC designer will jump the ship in 2025 and TSMC is a stock that goes to free fall. The headline will be "TSMC share trade down by 50% over a month as Apple leave TSMC and go for Intel"

    For Lunar Lake is going to be the new Intel Atom, and I also think that Lunar Lake will be Intel proposal to Valve for Steam Deck 3 if this didn't pull off it will be design and sell to MSI as Steam Deck 3 competitor.
  • Zoolook - Saturday, January 27, 2024 - link

    N3B and N3E is already on the market, of course Intel 20A/18A should be better, coming so much later to market. Apple don't need to nickel & dime it, they have high volume, good margins, they go for the most efficient chip and they design a new one every year, a redesign would be a complete waste.
    The last 10 years, TSMC has consistently delivered while Intel has floundered continuously, you'd be a real nutcase if you put all your eggs in an Intel basket of future promises.
    We all know how it went the last time Intel went all in and put massive changes from one node to another.
    Considering the power they need to equal AMD performance on current processes they have a lot to prove before I'd put any trust into their projections and promises.

    Samsung is too far behind it seems, trying to leapfrog a bit but they've had terrible yields and power performance on their last three nodes so I'm not holding my breath.
  • nandnandnand - Saturday, January 20, 2024 - link

    Maybe TSMC is being too cocky, or maybe Intel will screw it up again like they did with "10nm".
  • Dante Verizon - Sunday, January 21, 2024 - link

    2024, people are still putting faith in the empty promises of intel.
  • my_wing - Tuesday, January 23, 2024 - link

    Never Bet against the USA
  • Terry_Craig - Tuesday, January 23, 2024 - link

    Playing against the US = wasting money on a failed company like intel.
  • ET - Monday, January 22, 2024 - link

    TSMC is a better at delivering on its promises, so I take any future Intel roadmap with a grain of salt.

    Meteor Lake is another good example of how Intel just can't deliver. The part that shows the least improvement compared to previous CPUs is the Intel 4 part, the compute die. The graphics (much improved) and SoC (with the low power cores) are both TSMC, and on processes which on paper are larger (5,6 vs. 4).

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