Going For Power: Is 105W TDP Accurate?

For regular readers, we have covered the discrepancy in how different companies ascribe the Thermal Design Power to their product lines:

While Intel’s TDP represents the internal power measured for long and sustained high performance (also motherboard dependent), AMD’s metric is more akin to actual thermal cooling requirements for a given cooler rating. That being said, the power consumption of AMD’s first and second generation Ryzen processors has often been parallel to the TDP rating on the box, with the CPU levelling out to the TDP value as we load up the cores with a high energy workload.

For example, here’s our 16-core 1950X data. The Threadripper 1950X is a 180 W chip, and we saw the cores take a total of 134 W.

Here’s our Ryzen 7 2700X data.

This 105 W TDP processor was only recording 86W across the cores at full load.

It’s worth noting that our data is primarily to do with the total power consumed by the cores. There are other power factors at play, such as the Infinity Fabric, the DRAM controller, the PCIe controller, and any other IO, which might add up to the power of the overall package. The maximum power available to a processor should be the package, of which the cores take up most of the sum.

With Ryzen 3000 and Zen 2, AMD’s attachment to TDP was not as clinical as its first two generations of hardware. In our Ryzen 7 3700X review, with the 12-core processor, we saw this:

The Ryzen 7 3700X is a 65 W processor, and yet we can see that the cores total up to 74 W by themselves, with the rest of the chip taking another 16W or so, totalling 90 W for the whole chip. This aligns with AMD's 'PPT', the maximum power that can be supplied to the socket, which is around 88W. This is perhaps indicative of two things: firstly, that Intel’s turbo policy was creating 95 W TDP chips that consumed 160W in turbo modes and AMD believed it had headroom, or pushing these new chips to the edge required a little more power.

With the Ryzen 9 3900X, with 12 cores, we saw the same thing again.

Despite this being a 105 W TDP chip, the cores at full load saw 122 W peak, with the rest of the chip getting ~24 W, making for an overall 146 W power draw (as measured by the processor internally). PPT for this chip is meant to be 142W.

This shows that Zen 2 has a different strategy to the previous Zen chips when it comes to how AMD is mixing the difference between TDP and PPT. If we saw the same thing with the Ryzen 9 3950X, then it pretty much confirms the hypothesis.

At its peak, the 3950X draws 137 W for the cores when 10 cores are loaded. The chip as a whole hits ~144-145W at that level, well above the 105 W TDP rating on the box and bang on the 142W PPT. This is partly why AMD is recommending a large liquid cooler for this chip. Under Intel’s definition, the TDP rating is a guarantee for the power consumption at base frequency, although most Intel processors can go above that frequency and stay within the power. We might be seeing something similar here with AMD now.

It is worth noticing that when up to two cores are loaded, we see each core getting around 18 W of power, but when all the cores are loaded, we are seeing between 6.9 W and 7.6 W. This is compared to the 12-core 3900X, which has about 17.5 W per core initially, and falls down to 10 W per core. AMD is trying to get a higher single core frequency from the 16-core hardware, so by giving more power when a single core is loaded, this might help.

One other thing to note is where the peak power is observed. We kind of already saw this on the Ryzen 9 3900X in that review, where the peak power of the chip happened when 10 cores were loaded, not the full 12 cores. The difference between the two was minimal, but we’re seeing this on a larger scale with the Ryzen 9 3950X.

When looking at both the cores-only power and the CPU total power, we get a peak with this processor when 10 cores are loaded. This would indicate a 3+2+3+2 mix on the CCXes, which is perhaps an inflection point when current densities start getting much higher and per-core power has to be reduced to ensure everything is still working optimally. The power differential between 10-core use and 16-core use is almost 20W, so users that don’t always use all the cores all the time might exhibit good per-thread performance up to 10 core workloads.

Speaking of frequencies, this has been a touchy topic of late. We have seen with recent news and testing that some users are not observing peak single core frequencies of their Ryzen processors. As we explained in our deep dive of the issue, part of it comes down to the fact that AMD’s turbo policies for Zen 2 are different to Intel: only one core in a set is likely to turbo up to the highest frequency, whereas Intel’s Turbo Boost 2.0 mandates that all cores should hit peak turbo. The other part of it is the testing methodology, but also the fact that the ACPI standards at the OS level can indicate a turbo on a shorter time scale than software can record, ultimately giving users a smeared out version of that turbo value. Then there are other things, like BIOS versions and Windows power plans.

With our Ryzen 9 3950X, the on-the-box single core turbo frequency is listed as 4.7 GHz. We tested using the ASRock X570 Taichi motherboard, a very high-end product, using Windows 10 v1909 on AGESA 1004B, on both the High Performance (HP) power plan and the Ryzen High Performance (RHP) power plan. For peak single core frequencies, we were able to see 4525 MHz on the HP plan, and 4650 MHz on the RHP plan. This latter value is pretty much on the button for the on-the-box turbo value (I’m sure some people will disagree about those 50 MHz).

These values on the RHP power plan were very instantaneous, as when we put a consistent single thread load on the core, the frequencies very quickly came down.

On the Ryzen High Performance power plan, our sustained single core frequency dropped to 4450 MHz. In these tests, we use an affinity mask to limit how many cores are active while we run POV-Ray, and take the reading about 30 seconds into the benchmark, which allows a core to experience a form of heat soak and reach a reliable current density. This is also how we reached the 18 W per core value for 1-2 core loading in the graphs above, indicating that in order to get a sustained 4.7 GHz single core frequency, AMD would need to drive around 21-24W to the core in order to get that value. It is very likely that the CPU can hit those high numbers, for microseconds at a time, as per the ACPI/CPPC2 stack, but for any user doing per-second or per 100ms monitoring, they’re not likely to see it.

Within this frequency graph though, we can see that the frequency beyond 3 cores has segments. Between 3 cores and 8 cores loaded, we get 4225 MHz to 4125 MHz (100 MHz range), and even at all cores loaded, we’re seeing 3875 MHz, well above the 3500 MHz base frequency listed on the box.

In our full review, we are testing the Ryzen 9 3950X on both the HP and RHP power plans.

The AMD Ryzen 9 3950X Review: Mainstream Turns 16 Test Bed and Setup
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  • Drazick - Sunday, November 17, 2019 - link

    The DDR Technology is orthogonal.
    I want Quad and the latest memory available.
  • guyr - Friday, December 20, 2019 - link

    Anything is possible, of course. 5 years ago, who would have predicted 16 cores in a consumer-oriented CPU? However, neither Intel nor AMD has made any moves beyond 2 memory channels in the consumer space. The demand is simply not there to justify the increase in complexity and price. In the professional space, more channels are easily justified and the target market doesn't hesitate to pay the higher prices. So, it's all driven by what the market will bear.
  • alufan - Saturday, November 16, 2019 - link

    weird intel launches its chip a couple of weeks ago and it stayed upfront and main story for over a week, AMD launches what is in effect the best CPU ever tested by this site and it lasts a few Days before being pushed aside for another intel article am sure the intention by the reporters is to be fair and unbiased however I can see how the commercial motives of the site are being manipulated looks like intels up to its old tricks again, the thread ripper article lasted even less time but no chips have been tested(or at least released) yet which I guess makes sense
  • penev91 - Sunday, November 17, 2019 - link

    Just ignore everything Intel/AMD related on Anandtech. There's been an obvious bias for years.
  • Atom2 - Saturday, November 16, 2019 - link

    There has never been a situation as big as this one, where the bench software was benchmarked more than the hardware. Comprehensive overview of historic software development? Whatever the reason, it seems that keeping back AVX512 to only select few CPUs, was an unfortunate decision by Intel, which only contributed to the situation. Yes, you know, if you compile your code with compiler from 1998 and ignore all the guidelines how to write fast code ... Voila... For some reason however, nobody tries to run 20 year old CPU code on GPU though.
  • chrkv - Monday, November 18, 2019 - link

    Second page "On the Ryzen High Performance power plan, our sustained single core frequency dropped to 4450 MHz" - I believe just "the High Performance" should be here.
    Page 4 "Despite 5.0 GHz all-core turbo being on the 9900K" - should be "9900KS".
  • Irata - Tuesday, November 19, 2019 - link

    Quick question: Are any of your benchmarks affected by the Mathlab issue (Ryzen are crippled because a poor code path is used due to a vendor ID check for "genuine Intel" )?
  • twotwotwo - Tuesday, November 19, 2019 - link

    Intel's had these consumer-platform-based "entry-level Xeons" (once E3, now E) for a while. Despite some obvious limits, and that there are other low-end server options, enough folks want 'em to seed an ecosystem of rackmount and blade servers from Supermicro, Dell, etc.

    Anyway, the "pro" (ECC/management enabled) variant of Ryzen seems like a great fit for that. 16 cores and 24 PCIe 4 lanes are probably more useful for little servers than for most desktop users. It's also more balanced than the 8/16C EPYCs; it's cool they have 128 lanes and tons of memory channels, but it takes very specific applications to use them all with that few cores (caching?). Ideally the lesser I/O and lower TDPs also help make denser/cheaper boxes, and the consumer-ish clocks pay off for some things.

    The biggest argument against is that the entry-level server market is probably shrinking anyway as users rent tiny slices of huge boxes from cloud providers instead. It also probably doesn't have the best margins. So maybe you could release a competitive product there and still not make all that much off it.
  • halfflat - Thursday, November 21, 2019 - link

    Very curious about the AVX512 vs AVX2 results for 3dPM. It's really unusual to see even a 2x performance increase going from AVX2 to AVX512 on the same architecture, given that running AVX512 instructions will lower the clock.

    The non-AVX versions, I'm presuming, are utilizing SSE2.

    The i9-9900K gets a factor of 2 increase going from SSE2 to AVX2, which is pretty much what one would expect with twice as many fp operations per instruction. But the i9-7960X performance with AVX512 is *ten times* improved over SSE2, when the vector is only four times as wide and the cores will be running at a lower clock speed.

    Is there some particular AVX512-only operation that is determining this huge performance gap? Some further analysis of these results would be very interesting.
  • AIV - Wednesday, November 27, 2019 - link

    Somebody posted that it's caused by 64 bit integer multiplies, which are supported in AVX512, but not in AVX2 and thus fallback to scalar operations.

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